Functional model for the synthesis of nanostructures of the given quality level

Purpose: The aim of this paper is to develop a functional model for the synthesis of nanostructures of the given quality level, which will allow to effectively control the process of nanopatterning on the surface of semiconductors with tunable properties. Design/methodology/approach: The paper uses the IDEF0 methodology, which focuses on the functional design of the system under study and describes all the necessary processes with an accuracy sufficient for an unambiguous modelling of the system's activity. Based on this methodology, we have developed a functional model for the synthesis of nanostructures of the given quality level and tested its effectiveness through practice. Findings: The paper introduces a functional model for the synthesis of nanostructures on the surface of the given quality level semiconductors and identifies the main factors affecting the quality of nanostructures as well as the mechanisms for controlling the formation of porous layers with tunable properties. Using the example of etching single-crystal indium phosphide electrochemically in a hydrochloric acid solution, we demonstrate that the application of the suggested model provides a means of forming nanostructures with tunable properties, assessing the quality level of the nanostructures obtained and bringing the parameters in line with the reference indicators at a qualitatively new level. Research limitations/implications: Functional modelling using the IDEF0 methodology is widely used when process control is required. In this study it has been applied to control the synthesis of nanostructures of the given quality level on the surface of semiconductors. However, these studies require continuation, namely, the establishment of correlations between the technological and resource factors of synthesis and the acquired properties of nanostructures. Practical implications: This study has a significant practical effect. Firstly, it shows that functional modelling can reduce the time required to form large batches of the given quality level nanostructures. This has made it possible to substantiate the choice of the initial semiconductor parameters and nanostructure synthesis modes in industrial production from the theoretical and empirical perspective. Secondly, the presented methodology can be applied to control the synthesis of other nanostructures with desired properties and to reduce the expenses required when resources are depleted and the cost of raw materials is high. Originality/value: This paper is the first to apply the IDEF0 methodology to control the given quality nanostructure synthesis. This paper will be of value to engineers who are engaged in the synthesis of nanostructures, to researchers and scientists as well as to students studying nanotechnology.