A method of reducing switch count in three-level NPC inverter – analysis in steady states

The proof of a concept for a new method of modulation has been presented which reduce switch count in a three-level neutral point clamped (3L-NPC) inverter. The method is an implementation of space vector modulation (SVM) by means of a prediction algorithm and sequences of transistors, which are not common in use. Those sequences make active use of clamping diodes of the inverter. The prediction algorithm analyzes possible sequences of transistors’ states and choose those which offers smaller switch count. Measurements of steady states were taken on prototype 3L-NPC.