Implementation of modified additive lagged Fibonacci generator

Generator of pseudorandom bit sequence with increased cryptographic security, which is based on additive lagged Fibonacci generator, is developed. The generator structure circuit and it work principle are described in the paper. There are also given two variants of it construction that are formed on programmable logic device developed by Xilinx company. The main generator characteristics are researched, in particular: recurrence period, fastacting, statistical characteristics. In relation to the last the statistical portrait is presented, that was built with the help of NIST tests.