A method for testing the performance of a dual-core microcontroller with integrated program and data memory

The paper presents a set of test procedures for performing an extended test of dual-core microcontroller performance. The procedures described enable the performance of the system to be determined with regard to memory organization, mutual influence of cores and ability to verify the impact of code optimization level. The experimental trials were performed using an LPC4357 microcontroller with onboard FLASH and SRAM memory. The results obtained showed a slight performance drop for the various microcontrollers operating simultaneously in typical conditions. However, with frequent references to a shared memory, the performance drop may reach as much as 80%.